아키텍처 및 코드 최적화 연구실

Prior to that, I was a research associate in the Liberty Research Group at Princeton University, and a researcher and engineer at Parakinetics, Inc, tackling software challenges on multicore architectures with various compiler and run-time techniques. I also contributed to multiple successful VLSI implementation projects in the past, including Physical Uncloneable Function (PUF) (as ASIC design lead) and Raw Microprocessor at MIT. I have recently restarted ASIC prototyping of our architecture designs with my own students (like this one). I completed my Ph.D. in Computer Science at MIT as a member of Computer Science and Artificial Intelligence Lab (CSAIL) under the guidance of Prof. Krste Asanovic (now at the University of California, Berkeley) and Prof. Arvind. Before coming to MIT, I received my M.S. from Stanford University and B.S. from Seoul National University--both in Electrical Engineering.