어플리케이션 대상 시스템 최적화

We design compiler-level optimization techniques tailored to the characteristics of each target hardware — GPUs, PIM devices, and NPUs — to maximize performance while minimizing programming effort. We build runtime systems and schedulers that dynamically allocate resources and orchestrate concurrent workloads across heterogeneous devices, adapting to dynamic system state. We co-design custom hardware architectures — PIM functional units, FPGA-based neural accelerators, and GPU microarchitecture extensions — together with the software/compiler support needed to exploit them effectively. 1. Target-aware Compiler Optimization — Compiler techniques tailored to GPU, PIM, and NPU targets. 2. Runtime System Optimization — Dynamic scheduling and resource allocation across heterogeneous devices. 3. HW Optimization with SW Support (NPU, GPU, PIM) — Architecture/HW-level optimization with compiler/software support. We like to encourage undergraduates to get involved with research, especially if they intend to go to graduate school. We work with a small number of excellent undergraduate students each semester. Students should be strong C++ programmers, knowledge of computer architecture, and have a basic familiarity with compilers and OS. Interested students should send me an email (yongjunpark at yonsei.ac.kr) or drop by Engineering Building 4, D913.