성효진 연구실

With the end of Dennard scaling, we are witnessing a major shift in the computer system and microarchitecture design towards exploiting more specialized and lightweight “accelerators” of different types instead of relying on mostly general-purpose processors. Such heterogeneous systems pose an unprecedented challenge for the entire software stack to provide programmability and portability while delivering performance. We work on rethinking compiler and runtime technologies for heterogeneous systems with emerging architectures such as compute-augmented memory (NDP/PIM) (joint work with SK Hynix, KAIST, SNU, and other universities and start-ups). PIMFlow (CAL ’22, CGO ’23) proposes software layers specifically designed to accelerate compute-intensive convolutional layers on PIM-DRAM. XLA-NDP (CAL '23) introduces a compiler and runtime solution for NDPX to maximize parallelism based on GPU and NDPX costs. Generating high-performing codes for increasingly heterogeneous hardware calls for more flexible and adaptive ways to model program behaviors with different optimization decisions than traditional heuristic-based cost models. We take data-driven approaches where the code-performance relationship is accurately learned from code representation and profiling results. CogR (PACT ’19) guides the OpenMP runtime scheduler by predicting whether an OpenMP target region will execute faster on CPU on GPU using a deep-learning based predictor model, while MetaTune extends an auto-tuning framework in a deep-learning compiler, TVM, to reduce autotuning overheads and generate better-optimized codes for tensor operations. Most recently, One-shot Tuner (CC ’22) showed how online auto-autotuning overheads can be practically eliminated with a NAS-inspired performance predictor model trained