나노스핀수송 연구실

Our research focuses on developing future neuromorphic semiconductor device by implementing the control of electron's spin in addition to its charge pursuing ultrafast energy-efficient spintronic device. Based-on the electrical signals associated with spin transport, scattering, and dynamics in low-dimensional system, hybrid thin film and interfaces, we are pioneering new concepts of logic and memory devices that will be essential ingredients in future AI computing technology. The principles of CMOS operation, involving a switchable semiconductor conductance controlled by an insulating gate, have remained largely unchanged, even as transistors are miniaturized to sizes of 10 nanometres. New scalable logic technology beyond CMOS should provide improvements in efficiency and performance for von Neumann architectures and enable growth in emerging computing such as artifical intelligence. Such a computing technology needs to allow progressive miniaturization, reduce switching energy, improve device interconnection and provide a complete logic and memory family, which has been main goal in our research via developing new concept of spin-based memory and logic device. 2D materials, such as graphene and various TMDCs, are promising platform to exploit spin channel owing to versatile integration of intrinsic properties involved with spin and charge flow and their interconversion. Perhaps, what make them to be most attractive for spintronics could be gate-tunability of physical properties associated with spin-electronics, such as carrier concentration, electronic mobility, spin diffusion, Rashba spin-orbit interaction, spin-charge interconversion, etc. In the past decade, there have been many significant advances in exploiting spin currents in 2D materials, including efficient,